1304 search results - page 75 / 261 » Evaluating Hardware Compilation Techniques |
150
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ISCAS
2005
IEEE
15 years 10 months ago
2005
IEEE
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
138
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ISCA
2002
IEEE
15 years 9 months ago
2002
IEEE
Exponential growth in the number of on-chip transistors, coupled with reductions in voltage levels, makes each generation of microprocessors increasingly vulnerable to transient f...
126
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CCGRID
2007
IEEE
15 years 10 months ago
2007
IEEE
Increasing power consumption of high-performance systems leads to reliability, survivability, and cooling related problems. Motivated by this observation, several recent efforts f...
143
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FPL
2009
Springer
15 years 8 months ago
2009
Springer
Preemptive multitasking, a popular technique for timesharing of computational resources in software-based systems, faces considerable difficulties when applied to partially reconf...
116
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DATE
2005
IEEE
15 years 10 months ago
2005
IEEE
With new sophisticated compiler technology, it is possible to schedule distant instructions efficiently. As a consequence, the amount of exploitable instruction level parallelism...