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» Evaluating Hardware Compilation Techniques
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DATE
2008
IEEE
168views Hardware» more  DATE 2008»
15 years 11 months ago
Cycle-approximate Retargetable Performance Estimation at the Transaction Level
This paper presents a novel cycle-approximate performance estimation technique for automatically generated transaction level models (TLMs) for heterogeneous multicore designs. The...
Yonghyun Hwang, Samar Abdi, Daniel Gajski
ASAP
2004
IEEE
102views Hardware» more  ASAP 2004»
15 years 8 months ago
A Hierarchical Classification Scheme to Derive Interprocess Communication in Process Networks
The Compaan compiler automatically derives a Process Network (PN) description from an application written in Matlab. The basic element of a PN is a Producer/Consumer (P/C) pair. F...
Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere
ISCAPDCS
2007
15 years 5 months ago
Evaluation of architectural support for speech codecs application in large-scale parallel machines
— Next generation multimedia mobile phones that use the high bandwidth 3G cellular radio network consume more power. Multimedia algorithms such as speech, video transcodecs have ...
Naeem Zafar Azeemi
HPCA
2009
IEEE
16 years 5 months ago
Techniques for bandwidth-efficient prefetching of linked data structures in hybrid prefetching systems
Linked data structure (LDS) accesses are critical to the performance of many large scale applications. Techniques have been proposed to prefetch such accesses. Unfortunately, many...
Eiman Ebrahimi, Onur Mutlu, Yale N. Patt
ICS
2005
Tsinghua U.
15 years 10 months ago
Lightweight reference affinity analysis
Previous studies have shown that array regrouping and structure splitting significantly improve data locality. The most effective technique relies on profiling every access to eve...
Xipeng Shen, Yaoqing Gao, Chen Ding, Roch Archamba...