1304 search results - page 98 / 261 » Evaluating Hardware Compilation Techniques |
161
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CSCLP
2004
Springer
15 years 10 months ago
2004
Springer
We introduce a framework for studying and solving a class of CSP formulations. The framework allows constraints to be expressed as linear and nonlinear equations, then compiles th...
142
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ICCAD
2008
IEEE
16 years 1 months ago
2008
IEEE
—SystemC is a system-level modeling language that offers a wide range of features to describe concurrent systems rent levels of abstraction. The SystemC standard permits simulato...
147
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IEEEPACT
2000
IEEE
15 years 9 months ago
2000
IEEE
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
141
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VLSISP
2008
15 years 4 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
136
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DATE
1999
IEEE
15 years 8 months ago
1999
IEEE
This paper addresses the problem of efficient functional simulation of synchronous digital systems. A technique based on the use of Decision Diagrams (DD) for representing the fun...