Sciweavers

127 search results - page 6 / 26
» Evaluating Hardware Support for Reference Counting Using Sof...
Sort
View
ASPLOS
1992
ACM
13 years 11 months ago
Efficient Superscalar Performance Through Boosting
The foremost goal of superscalar processor design is to increase performance through the exploitation of instruction-level parallelism (ILP). Previous studies have shown that spec...
Michael D. Smith, Mark Horowitz, Monica S. Lam
ERSA
2008
103views Hardware» more  ERSA 2008»
13 years 9 months ago
A Hardware Accelerator for k-th Nearest Neighbor Thinning
This paper presents an accelerator for k-th nearest neighbor thinning, a run time intensive algorithmic kernel used in recent multi-objective optimizers. We discuss the thinning al...
Tobias Schumacher, Robert Meiche, Paul Kaufmann, E...
ACSAC
2003
IEEE
13 years 11 months ago
Defending Embedded Systems Against Buffer Overflow via Hardware/Software
Buffer overflow attacks have been causing serious security problems for decades. With more embedded systems networked, it becomes an important research problem to defend embedded ...
Zili Shao, Qingfeng Zhuge, Yi He, Edwin Hsing-Mean...
ANCS
2010
ACM
13 years 5 months ago
The case for hardware transactional memory in software packet processing
Software packet processing is becoming more important to enable differentiated and rapidly-evolving network services. With increasing numbers of programmable processor and acceler...
Martin Labrecque, J. Gregory Steffan
ISCA
1999
IEEE
110views Hardware» more  ISCA 1999»
13 years 11 months ago
Decoupling Local Variable Accesses in a Wide-Issue Superscalar Processor
Providing adequate data bandwidth is extremely important for a wide-issue superscalar processor to achieve its full performance potential. Adding a large number of ports to a data...
Sangyeun Cho, Pen-Chung Yew, Gyungho Lee