201 search results - page 27 / 41 » Evaluating Run-Time Techniques for Leakage Power Reduction |
GLVLSI
2010
IEEE
14 years 21 days ago
2010
IEEE
The development of compiler-based mechanisms to reduce the percentage of hotspots and optimize the thermal profile of large register files has become an important issue. Thermal...
CP
2003
Springer
14 years 25 days ago
2003
Springer
Abstract. Many real world problems, e.g. personnel scheduling and transportation planning, can be modeled naturally as Constrained Shortest Path Problems (CSPPs), i.e., as Shortest...
HPCA
2005
IEEE
14 years 8 months ago
2005
IEEE
Due to increasing power densities, both on-chip average and peak temperatures are fast becoming a serious bottleneck in processor design. This is due to the cost of removing the h...
FPGA
2008
ACM
13 years 9 months ago
2008
ACM
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
The capability of predicting the temperature profile is critically important for timing estimation, leakage reduction, power estimation, hotspot avoidance and reliability concerns ...