201 search results - page 37 / 41 » Evaluating Run-Time Techniques for Leakage Power Reduction |
JMLR
2010
13 years 6 months ago
2010
Traditional analysis methods for single-trial classification of electro-encephalography (EEG) focus on two types of paradigms: phase-locked methods, in which the amplitude of the...
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
As memory speeds and bus capacitances continue to rise, external memory bus power will make up an increasing portion of the total system power budget for system-on-a-chip embedded...
SIGMOD
2003
ACM
14 years 7 months ago
2003
ACM
We discuss the design of an acquisitional query processor for data collection in sensor networks. Acquisitional issues are those that pertain to where, when, and how often data is...
ICPP
2007
IEEE
14 years 1 months ago
2007
IEEE
Compute clusters are consuming more power at higher densities than ever before. This results in increased thermal dissipation, the need for powerful cooling systems, and ultimatel...
DATE
2010
IEEE
14 years 20 days ago
2010
IEEE
—In this paper, we examine the design process of a Network on-Chip (NoC) for a high-end commercial System onChip (SoC) application. We present several design choices and focus on...