39 search results - page 3 / 8 » Evaluating SPLASH-2 Applications Using MapReduce |
ICDE
2011
IEEE
12 years 10 months ago
2011
IEEE
MapReduce is a computing paradigm that has gained a lot of popularity as it allows non-expert users to easily run complex analytical tasks at very large-scale. At such scale, task...
ISCA
2011
IEEE
12 years 10 months ago
2011
IEEE
Blocked-execution multiprocessor architectures continuously run atomic blocks of instructions — also called Chunks. Such architectures can boost both performance and software pr...
IPPS
2009
IEEE
14 years 1 months ago
2009
IEEE
Abstract—Widespread emergence of multicore processors will spur development of parallel applications, exposing programmers to degrees of hardware concurrency hitherto unavailable...
HPCA
2008
IEEE
14 years 7 months ago
2008
IEEE
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a bottleneck that prevents these architectures from scaling...
HPCA
2012
IEEE
12 years 2 months ago
2012
IEEE
Lowering supply voltage is one of the most effective techniques for reducing microprocessor power consumption. Unfortunately, at low voltages, chips are very sensitive to process ...