38 search results - page 2 / 8 » Evaluating Techniques for Exploiting Instruction Slack |
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
ASPLOS
2012
ACM
12 years 3 months ago
2012
ACM
Future microprocessors need low-cost solutions for reliable operation in the presence of failure-prone devices. A promising approach is to detect hardware faults by deploying low-...
MICRO
2005
IEEE
14 years 28 days ago
2005
IEEE
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
RTS
2011
13 years 2 months ago
2011
Reliability-aware power management (RAPM) has been a recent research focus due the negative effects of the popular power management technique dynamic voltage and frequency scaling ...
CC
2012
Springer
12 years 3 months ago
2012
Springer
Abstract. Data-parallel languages like OpenCL and CUDA are an important means to exploit the computational power of today’s computing devices. In this paper, we deal with two asp...