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HPCA
2006
IEEE
14 years 8 months ago
BulletProof: a defect-tolerant CMP switch architecture
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
Kypros Constantinides, Stephen Plaza, Jason A. Blo...
EUROSYS
2010
ACM
14 years 4 months ago
Q-Clouds: Managing Performance Interference Effects for QoS-Aware Clouds
Cloud computing offers users the ability to access large pools of computational and storage resources on demand. Multiple commercial clouds already allow businesses to replace, or...
Ripal Nathuji, Aman Kansal, Alireza Ghaffarkhah
CHI
2010
ACM
14 years 2 months ago
LayerPaint: a multi-layer interactive 3D painting interface
Painting on 3D surfaces is an important operation in computer graphics, virtual reality, and computer aided design. The painting styles in existing WYSIWYG systems can be awkward,...
Chi-Wing Fu, Jiazhi Xia, Ying He 0001
ICPP
2009
IEEE
14 years 2 months ago
LeWI: A Runtime Balancing Algorithm for Nested Parallelism
Abstract—We present LeWI: a novel load balancing algorithm, that can balance applications with very different patterns of imbalance. Our algorithm can balance fine grain imbalan...
Marta Garcia, Julita Corbalán, Jesús...
NOCS
2007
IEEE
14 years 2 months ago
On Characterizing Performance of the Cell Broadband Engine Element Interconnect Bus
Abstract – With the rise of multicore computing, the design of onchip networks (or networks on chip) has become an increasingly important component of computer architecture. The ...
Thomas William Ainsworth, Timothy Mark Pinkston