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» Evaluating kilo-instruction multiprocessors
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IPPS
2010
IEEE
13 years 5 months ago
Parallel external memory graph algorithms
In this paper, we study parallel I/O efficient graph algorithms in the Parallel External Memory (PEM) model, one of the private-cache chip multiprocessor (CMP) models. We study the...
Lars Arge, Michael T. Goodrich, Nodari Sitchinava
CAP
2010
13 years 2 months ago
Polynomial homotopies on multicore workstations
Homotopy continuation methods to solve polynomial systems scale very well on parallel machines. In this paper we examine its parallel implementation on multiprocessor multicore wo...
Jan Verschelde, Genady Yoffe
ANSS
2002
IEEE
14 years 14 days ago
Evaluating the Performance of Photonic Interconnection Networks
This paper describes the design and use of the Interconnection Network Simulator (ICNS) framework. ICNS is a modular, object-oriented simulation system that has been developed to ...
Roger D. Chamberlain, Ch'ng Shi Baw, Mark A. Frank...
HPCA
2007
IEEE
14 years 7 months ago
Evaluating MapReduce for Multi-core and Multiprocessor Systems
This paper evaluates the suitability of the MapReduce model for multi-core and multi-processor systems. MapReduce was created by Google for application development on data-centers...
Colby Ranger, Ramanan Raghuraman, Arun Penmetsa, G...
WMPI
2004
ACM
14 years 28 days ago
Evaluating kilo-instruction multiprocessors
The ever increasing gap in processor and memory speeds has a very negative impact on performance. One possible solution to overcome this problem is the Kilo-instruction processor. ...
Marco Galluzzi, Ramón Beivide, Valentin Pue...