417 search results - page 2 / 84 » Evaluating kilo-instruction multiprocessors |
PDP
1996
IEEE
13 years 11 months ago
1996
IEEE
A case study of performance and dependability evaluation of fault-tolerant multiprocessors is presented. Two specific architectures are analyzed taking into account system functio...
EUROPAR
1997
Springer
13 years 11 months ago
1997
Springer
The shared cache structures and snoop cache structures for single-chip multiprocessors are evaluated and compared using an instruction level simulator. Simulation results show that...
JSSPP
1997
Springer
1997
Springer
An Experimental Evaluation of Processor Pool-Based Scheduling for Shared-Memory NUMA Multiprocessors
13 years 11 months ago
In this paper we describe the design, implementation and experimental evaluation of a technique for operating system schedulers called processor pool-based scheduling [51]. Our tec...
TC
1998
13 years 7 months ago
1998
—We evaluate three extensions to directory-based cache coherence protocols in shared-memory multiprocessors. These extensions are aimed at reducing the penalties associated with ...
PDPTA
2000
13 years 8 months ago
2000
This paper deals with multiprocessor systems required to provide both high performance and good figures of dependability attributes. Fault tolerance is pursued through a proper co...