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» Evaluating kilo-instruction multiprocessors
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HICSS
1999
IEEE
121views Biometrics» more  HICSS 1999»
13 years 12 months ago
Evaluation of the JIAJIA Software DSM System on High Performance Computer Architectures
Distributed Shared Memory (DSM) combines the scalability of loosely coupled multicomputer systems with the ease of usability of tightly coupled multiprocessors, and allows transpa...
M. Rasit Eskicioglu, T. Anthony Marsland, Weiwu Hu...
ICCS
2004
Springer
14 years 29 days ago
On the Evaluation of x86 Web Servers Using Simics: Limitations and Trade-Offs
In this paper, we present our first experiences using Simics, a simulator which allows full-system simulation of multiprocessor architectures. We carry out a detailed performance ...
Francisco J. Villa, Manuel E. Acacio, José ...
SIPS
2008
IEEE
14 years 2 months ago
Efficient mapping of advanced signal processing algorithms on multi-processor architectures
Modern microprocessor technology is migrating from simply increasing clock speeds on a single processor to placing multiple processors on a die to increase throughput and power pe...
Bhavana B. Manjunath, Aaron S. Williams, Chaitali ...
CODES
2007
IEEE
14 years 1 months ago
Dynamic security domain scaling on symmetric multiprocessors for future high-end embedded systems
We propose a method for dynamic security domain scaling on SMPs that offers both highly scalable performance and high security for future high-end embedded systems. Its most impor...
Hiroaki Inoue, Akihisa Ikeno, Tsuyoshi Abe, Junji ...
MICRO
2006
IEEE
104views Hardware» more  MICRO 2006»
14 years 1 months ago
Leveraging Optical Technology in Future Bus-based Chip Multiprocessors
Although silicon optical technology is still in its formative stages, and the more near-term application is chip-to-chip communication, rapid advances have been made in the develo...
Nevin Kirman, Meyrem Kirman, Rajeev K. Dokania, Jo...