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» Evaluating kilo-instruction multiprocessors
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HPCA
2006
IEEE
14 years 8 months ago
Exploiting parallelism and structure to accelerate the simulation of chip multi-processors
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...
David A. Penry, Daniel Fay, David Hodgdon, Ryan We...
SOSP
2009
ACM
14 years 4 months ago
PRES: probabilistic replay with execution sketching on multiprocessors
Bug reproduction is critically important for diagnosing a production-run failure. Unfortunately, reproducing a concurrency bug on multi-processors (e.g., multi-core) is challengin...
Soyeon Park, Yuanyuan Zhou, Weiwei Xiong, Zuoning ...
CODES
2007
IEEE
14 years 1 months ago
Event-based re-training of statistical contention models for heterogeneous multiprocessors
Embedded single-chip heterogeneous multiprocessor (SCHM) systems experience frequent system events such as task preemption, power-saving voltage/frequency scaling, or arrival of n...
Alex Bobrek, JoAnn M. Paul, Donald E. Thomas
IPPS
2007
IEEE
14 years 1 months ago
A Near-optimal Solution for the Heterogeneous Multi-processor Single-level Voltage Setup Problem
A heterogeneous multi-processor (HeMP) system consists of several heterogeneous processors, each of which is specially designed to deliver the best energy-saving performance for a...
Tai-Yi Huang, Yu-Che Tsai, Edward T.-H. Chu
IPPS
2005
IEEE
14 years 1 months ago
Scheduling Algorithms for Effective Thread Pairing on Hybrid Multiprocessors
With the latest high-end computing nodes combining shared-memory multiprocessing with hardware multithreading, new scheduling policies are necessary for workloads consisting of mu...
Robert L. McGregor, Christos D. Antonopoulos, Dimi...