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» Evaluating kilo-instruction multiprocessors
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IPPS
2006
IEEE
14 years 1 months ago
Coterminous locality and coterminous group data prefetching on chip-multiprocessors
Due to shared cache contentions and interconnect delays, data prefetching is more critical in alleviating penalties from increasing memory latencies and demands on Chip-Multiproce...
Xudong Shi, Zhen Yang, Jih-Kwon Peir, Lu Peng, Yen...
ISCA
2006
IEEE
138views Hardware» more  ISCA 2006»
14 years 1 months ago
Program Demultiplexing: Data-flow based Speculative Parallelization of Methods in Sequential Programs
We present Program Demultiplexing (PD), an execution paradigm that creates concurrency in sequential programs by "demultiplexing" methods (functions or subroutines). Cal...
Saisanthosh Balakrishnan, Gurindar S. Sohi
ISCAS
2006
IEEE
87views Hardware» more  ISCAS 2006»
14 years 1 months ago
NoC monitoring: impact on the design flow
Abstract— Networks-on-chip (NoCs) are a scalable interconnect solution to large scale multiprocessor systems on chip and are rapidly becoming reality. As the ratio of embedded co...
Calin Ciordas, Kees Goossens, Andrei Radulescu, Tw...
DSN
2005
IEEE
14 years 1 months ago
Lumping Matrix Diagram Representations of Markov Models
Continuous-time Markov chains (CTMCs) have been used successfully to model the dependability and performability of many systems. Matrix diagrams (MDs) are known to be a space-efï¬...
Salem Derisavi, Peter Kemper, William H. Sanders
IPPS
2005
IEEE
14 years 1 months ago
High-Performance Direct Pairwise Comparison of Large Genomic Sequences
Many applications in Comparative Genomics lend themselves to implementations that take advantage of common high-performance features in modern microprocessors. However, the common...
Christopher Mueller, Mehmet M. Dalkilic, Andrew Lu...