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ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
16 years 5 hour ago
An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors
This paper presents a high-availability system architecture called INDRA — an INtegrated framework for Dependable and Revivable Architecture that enhances a multicore processor ...
Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, Mrinmo...
IPPS
2003
IEEE
15 years 11 months ago
Leveraging Block Decisions and Aggregation in the ShareStreams QoS Architecture
ShareStreams (Scalable Hardware Architectures for Stream Schedulers) is a canonical architecture for realizing a range of scheduling disciplines. This paper discusses the design c...
Raj Krishnamurthy, Sudhakar Yalamanchili, Karsten ...
RTAS
2003
IEEE
15 years 11 months ago
Analysis of the Execution Time Unpredictability caused by Dynamic Branch Prediction
This paper investigates how dynamic branch prediction in a microprocessor affects the predictability of execution time for software running on that processor. By means of experim...
Jakob Engblom
ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
15 years 11 months ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock
OOPSLA
2001
Springer
15 years 10 months ago
Points-To Analysis for Java using Annotated Constraints
The goal of points-to analysis for Java is to determine the set of objects pointed to by a reference variable or a reference object field. This information has a wide variety of ...
Atanas Rountev, Ana Milanova, Barbara G. Ryder