272 search results - page 33 / 55 » Evaluating the Model Accuracy in Automated Design Space Expl... |
ICASSP
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents accurate area and power estimation models for implementations using FPGAs from the Xilinx Virtex-2Pro family. These models are designed to facilitate efficien...
VLSISP
2011
13 years 2 months ago
2011
This paper presents accurate area, time, power estimation models for implementations using FPGAs from the Xilinx Virtex-2Pro family [1]. These models are designed to facilitate ef...
PACS
2000
Springer
13 years 11 months ago
2000
Springer
Reducing power, on both a per cycle basis and as the total energy used over the lifetime of an application, has become more important as small and embedded devices become increasi...
FCCM
2011
IEEE
12 years 11 months ago
2011
IEEE
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
FDL
2006
IEEE
14 years 1 months ago
2006
IEEE
Reusing IP-cores to construct system models facilitated by automated generation of glue-logic, and automated composability checks can help designers to create efficient simulation...