272 search results - page 4 / 55 » Evaluating the Model Accuracy in Automated Design Space Expl... |
SIES
2007
IEEE
14 years 1 months ago
2007
IEEE
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
— In this paper, we present a high-level power model to estimate the power consumption in semi-global and global interconnects. Such interconnects are used for communications bet...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
As industry moves towards many-core chips, networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. With power now the first-order design constr...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Rapid design space exploration with accurate models is necessary to improve designer productivity at the electronic system level. We describe how to use a new event-based design f...
ESTIMEDIA
2007
Springer
14 years 1 months ago
2007
Springer
This paper presents a technique for high-level power estimation of microprocessors. The technique, which is based on abstract execution profiles called ’event signatures’, op...