Sciweavers

190 search results - page 7 / 38
» Evaluating the Performance of Photonic Interconnection Netwo...
Sort
View
SIGMETRICS
1990
ACM
129views Hardware» more  SIGMETRICS 1990»
13 years 11 months ago
An Analytical Model of Multistage Interconnection Networks
Multiprocessors require an interconnection network to connect processors with memory modules. The performance of the interconnection network can have a large effect upon overall s...
Darryl L. Willick, Derek L. Eager
TC
2008
13 years 7 months ago
Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
HPCA
2009
IEEE
14 years 8 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
IPPS
1996
IEEE
13 years 11 months ago
An Optical Interconnect Model for k-ary n-cube Wormhole Networks
This paper presents an optical interconnect model for kary n-cube network topologies based on free-space analysis. This model integrates relevant parameters inherent to optics wit...
Mongkol Raksapatcharawong, Timothy Mark Pinkston
JPDC
1998
131views more  JPDC 1998»
13 years 7 months ago
Modeling Free-Space Optical k-ary n-Cube Wormhole Networks
This paper presents an optical interconnect model for k-ary n-cube network topologies based on freespace analysis. This model integrates relevant parameters inherent to optics wit...
Mongkol Raksapatcharawong, Timothy Mark Pinkston