Multiprocessors require an interconnection network to connect processors with memory modules. The performance of the interconnection network can have a large effect upon overall s...
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
This paper presents an optical interconnect model for kary n-cube network topologies based on free-space analysis. This model integrates relevant parameters inherent to optics wit...
This paper presents an optical interconnect model for k-ary n-cube network topologies based on freespace analysis. This model integrates relevant parameters inherent to optics wit...