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FPL
2004
Springer
101views Hardware» more  FPL 2004»
14 years 4 days ago
The Chess Monster Hydra
Abstract. With the help of the FPGA technology, the boarder between hardand software has vanished. It is now possible to develop complex designs and fine grained parallel applicat...
Chrilly Donninger, Ulf Lorenz
HPCA
1998
IEEE
13 years 10 months ago
Non-Stalling CounterFlow Architecture
The counterflow pipeline concept was originated by Sproull et al.[1] to demonstrate the concept of asynchronous circuits. This architecture relies on distributed decision making an...
Michael F. Miller, Kenneth J. Janik, Shih-Lien Lu
IPPS
2006
IEEE
14 years 24 days ago
Improving cache locality for thread-level speculation
With the advent of chip-multiprocessors (CMPs), Thread-Level Speculation (TLS) remains a promising technique for exploiting this highly multithreaded hardware to improve the perfo...
Stanley L. C. Fung, J. Gregory Steffan
SOFTVIS
2010
ACM
13 years 4 months ago
Dependence cluster visualization
Large clusters of mutual dependence have long been regarded as a problem impeding comprehension, testing, maintenance, and reverse engineering. An effective visualization can aid ...
Syed S. Islam, Jens Krinke, David Binkley
PVM
2005
Springer
14 years 7 days ago
Cooperative Write-Behind Data Buffering for MPI I/O
Many large-scale production parallel programs often run for a very long time and require data checkpoint periodically to save the state of the computation for program restart and/o...
Wei-keng Liao, Kenin Coloma, Alok N. Choudhary, Le...