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IEEEPACT
2005
IEEE
14 years 9 days ago
HUNTing the Overlap
Hiding communication latency is an important optimization for parallel programs. Programmers or compilers achieve this by using non-blocking communication primitives and overlappi...
Costin Iancu, Parry Husbands, Paul Hargrove
CCGRID
2010
IEEE
13 years 7 months ago
A Map-Reduce System with an Alternate API for Multi-core Environments
Map-reduce framework has received a significant attention and is being used for programming both large-scale clusters and multi-core systems. While the high productivity aspect of ...
Wei Jiang, Vignesh T. Ravi, Gagan Agrawal
ISCA
2011
IEEE
313views Hardware» more  ISCA 2011»
12 years 10 months ago
FabScalar: composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template
A growing body of work has compiled a strong case for the single-ISA heterogeneous multi-core paradigm. A single-ISA heterogeneous multi-core provides multiple, differently-design...
Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay ...
CCS
2011
ACM
12 years 6 months ago
MIDeA: a multi-parallel intrusion detection architecture
Network intrusion detection systems are faced with the challenge of identifying diverse attacks, in extremely high speed networks. For this reason, they must operate at multi-Giga...
Giorgos Vasiliadis, Michalis Polychronakis, Sotiri...
ASAP
2003
IEEE
133views Hardware» more  ASAP 2003»
14 years 20 hour ago
Storage Management in Process Networks using the Lexicographically Maximal Preimage
At the Leiden Embedded Research Center, we are developing a compiler called Compaan that automatically translates signal processing applications written in Matlab into Kahn Proces...
Alexandru Turjan, Bart Kienhuis