207 search results - page 29 / 42 » Evaluating the Performance of Software Cache Coherence |
IEEEPACT
2002
IEEE
14 years 13 days ago
2002
IEEE
Simultaneous Multithreading (SMT) processors achieve high processor throughput at the expense of single-thread performance. This paper investigates resource allocation policies fo...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper presents and evaluates a strategy for integrating the Snort network intrusion detection system into a high-performance programmable Ethernet network interface card (NIC...
ASPLOS
2011
ACM
12 years 11 months ago
2011
ACM
The adoption of transactional memory is hindered by the high overhead of software transactional memory and the intrusive design changes required by previously proposed TM hardware...
RT
2001
Springer
13 years 12 months ago
2001
Springer
Abstract. Many disciplines must handle the creation, visualization, and manipulation of huge and complex 3D environments. Examples include large structural and mechanical engineeri...
HPCA
2006
IEEE
14 years 7 months ago
2006
IEEE
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...