120 search results - page 11 / 24 » Evaluating the impact of dynamic binary translation systems ... |
IPCCC
2006
IEEE
14 years 22 days ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
IPPS
2010
IEEE
13 years 4 months ago
2010
IEEE
Abstract-- Recent studies have shown that cache partitioning is an efficient technique to improve throughput, fairness and Quality of Service (QoS) in CMP processors. The cache par...
IEEEPACT
2006
IEEE
14 years 22 days ago
2006
IEEE
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
IPPS
1999
IEEE
13 years 11 months ago
1999
IEEE
Abstract. Clusters of PCs are an attractive platform for parallel applications because of their cost effectiveness. We have implemented an interoperable runtime system called Conve...
FPGA
2005
ACM
14 years 7 days ago
2005
ACM
Recent works demonstrate several benefits of synthesizing software binaries onto FPGA hardware, including incorporating hardware design into established software tool flows with m...