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» Evaluation of Parallel Logic Simulation Using DVSIM
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120
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PDP
2003
IEEE
15 years 8 months ago
A Parallel Evolutionary Algorithm for Circuit Partitioning
As general-purpose parallel computers are increasingly being used to speed up different VLSI applications, the development of parallel algorithms for circuit testing, logic minimi...
Raul Baños, Consolación Gil, Maria D...
ASPLOS
2010
ACM
15 years 7 months ago
An asymmetric distributed shared memory model for heterogeneous parallel systems
Heterogeneous computing combines general purpose CPUs with accelerators to efficiently execute both sequential control-intensive and data-parallel phases of applications. Existin...
Isaac Gelado, Javier Cabezas, Nacho Navarro, John ...
GECCO
2007
Springer
300views Optimization» more  GECCO 2007»
15 years 8 months ago
A NSGA-II, web-enabled, parallel optimization framework for NLP and MINLP
Engineering design increasingly uses computer simulation models coupled with optimization algorithms to find the best design that meets the customer constraints within a time con...
David J. Powell, Joel K. Hollingsworth
92
Voted
DFT
2005
IEEE
103views VLSI» more  DFT 2005»
15 years 8 months ago
Methodologies and Algorithms for Testing Switch-Based NoC Interconnects
In this paper, we present two novel methodologies for testing the interconnect fabrics of network-on-chip (NoC) based chips. Both use the concept of recursive testing, with differ...
Cristian Grecu, Partha Pratim Pande, Baosheng Wang...
121
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CN
2011
111views more  CN 2011»
14 years 6 months ago
On the design of network control and management plane
We provide a design of a control and management plane for data networks using the abstraction of 4D architecture, utilizing and extending 4D’s concept of a logically centralized...
Hammad Iqbal, Taieb Znati