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DAC
2010
ACM
14 years 23 days ago
Off-chip memory bandwidth minimization through cache partitioning for multi-core platforms
We present a methodology for off-chip memory bandwidth minimization through application-driven L2 cache partitioning in multicore systems. A major challenge with multi-core system...
Chenjie Yu, Peter Petrov
SIGIR
2010
ACM
14 years 22 days ago
Effective music tagging through advanced statistical modeling
Music information retrieval (MIR) holds great promise as a technology for managing large music archives. One of the key components of MIR that has been actively researched into is...
Jialie Shen, Wang Meng, Shuichang Yan, HweeHwa Pan...
GLVLSI
2007
IEEE
158views VLSI» more  GLVLSI 2007»
13 years 10 months ago
RT-level vector selection for realistic peak power simulation
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...
Chia-Chien Weng, Ching-Shang Yang, Shi-Yu Huang
SIGCOMM
2010
ACM
13 years 9 months ago
Rethinking iBGP routing
The Internet is organized as a collection of administrative domains, known as Autonomous Systems (ASes). These ASes interact through the Border Gateway Protocol (BGP) that allows ...
Iuniana M. Oprescu, Mickael Meulle, Steve Uhlig, C...
CPHYSICS
2006
127views more  CPHYSICS 2006»
13 years 9 months ago
GenAnneal: Genetically modified Simulated Annealing
A modification of the standard Simulated Annealing (SA) algorithm is presented for finding the global minimum of a continuous multidimensional, multimodal function. We report resu...
Ioannis G. Tsoulos, Isaac E. Lagaris