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» Evolutionary-Reduced Ordered Binary Decision Diagram
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ISMVL
2000
IEEE
98views Hardware» more  ISMVL 2000»
14 years 2 months ago
Implementation of Multiple-Output Functions Using PQMDDs
A sequential realization of multiple-output logic functions is presented. A conventional sequential realization is based on SBDDs (Shared reduced ordered Binary Decision Diagrams)...
Yukihiro Iguchi, Tsutomu Sasao, Munehiro Matsuura
ICCD
2006
IEEE
125views Hardware» more  ICCD 2006»
14 years 6 months ago
Partial Functional Manipulation Based Wirelength Minimization
—In-place flipping of rectangular blocks/cells can potentially reduce the wirelength of a floorplan/placement solution without changing the chip area, In a recent work [Hao 05], ...
Avijit Dutta, David Z. Pan
DAC
1996
ACM
14 years 2 months ago
Bit-Level Analysis of an SRT Divider Circuit
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
Randal E. Bryant
ICCTA
2007
IEEE
14 years 1 months ago
What Graphs can be Efficiently Represented by BDDs?
We have carried out experimental research into implicit representation of large graphs using reduced ordered binary decision diagrams (OBDDs). We experimentally show that for grap...
Changxing Dong, Paul Molitor
JUCS
2010
143views more  JUCS 2010»
13 years 8 months ago
Design of Arbiters and Allocators Based on Multi-Terminal BDDs
: Assigning one (more) shared resource(s) to several requesters is a function of arbiters (allocators). This class of decision-making modules can be implemented in a number of ways...
Václav Dvorák, Petr Mikusek