Sciweavers

115 search results - page 20 / 23
» Evolving Hardware by Dynamically Reconfiguring Xilinx FPGAs
Sort
View
ERSA
2007
174views Hardware» more  ERSA 2007»
13 years 9 months ago
High-Level Specification of Runtime Reconfigurable Designs
”C to Gates” compilers for FPGAs have been a topic of investigation for nearly two decades. Some of these endeavors have reached a point of viability. Impulse C, for example, ...
Stephen D. Craven, Peter M. Athanas
JCP
2007
153views more  JCP 2007»
13 years 7 months ago
An Integrated Educational Platform Implementing Real, Remote Lab-Experiments for Electrical Engineering Courses
—This paper describes an Internet-based laboratory, named Remote Monitored and Controlled Laboratory (RMCLab) developed at University of Patras, Greece, for electrical engineerin...
Dimitris Karadimas, Kostas Efstathiou
FPL
2008
Springer
103views Hardware» more  FPL 2008»
13 years 9 months ago
No-break dynamic defragmentation of reconfigurable devices
We propose a new method for defragmenting the module layout of a reconfigurable device, enabled by a novel approach for dealing with communication needs between relocated modules ...
Sándor P. Fekete, Tom Kamphans, Nils Schwee...
FCCM
2002
IEEE
126views VLSI» more  FCCM 2002»
14 years 20 days ago
Hyperspectral Image Compression on Reconfigurable Platforms
NASA’s satellites currently do not make use of advanced image compression techniques during data transmission to earth because of limitations in the available platforms. With th...
Thomas W. Fry, Scott Hauck
IPPS
2003
IEEE
14 years 1 months ago
Evolutionary Fault Recovery in a Virtex FPGA Using a Representation that Incorporates Routing
Most evolutionary approaches to fault recovery in FPGAs focus on evolving alternative logic configurations as opposed to evolving the intra-cell routing. Since the majority of tra...
Jason D. Lohn, Gregory V. Larchev, Ronald F. DeMar...