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TOG
2010
156views more  TOG 2010»
13 years 1 months ago
Style-content separation by anisotropic part scales
We perform co-analysis of a set of man-made 3D objects to allow the creation of novel instances derived from the set. We analyze the objects at the part level and treat the anisot...
Kai Xu 0004, Honghua Li, Hao Zhang 0002, Daniel Co...
ICCD
1994
IEEE
142views Hardware» more  ICCD 1994»
13 years 11 months ago
Grammar-Based Optimization of Synthesis Scenarios
Systems for multi-level logic optimization are usually based on a set of specialized, loosely-related transformations which work on a network representation. The sequence of trans...
Andreas Kuehlmann, Lukas P. P. P. van Ginneken
ICPR
2002
IEEE
14 years 8 months ago
Bayesian Rendering with Non-Parametric Multiscale Prior Model
This paper investigates the use of the Bayesian inference for devising an example-based rendering procedure. As prior model of this Bayesian inference, we exploit the multiscale n...
Max Mignotte
DATE
2006
IEEE
176views Hardware» more  DATE 2006»
14 years 1 months ago
Low power synthesis of dynamic logic circuits using fine-grained clock gating
— Clock power consumes a significant fraction of total power dissipation in high speed precharge/evaluate logic styles. In this paper, we present a novel low-cost design methodol...
Nilanjan Banerjee, Kaushik Roy, Hamid Mahmoodi-Mei...
CHARME
2001
Springer
117views Hardware» more  CHARME 2001»
13 years 11 months ago
A Higher-Level Language for Hardware Synthesis
We describe SAFL+: a call-by-value, parallel language in the style of ML which combines imperative, concurrent and functional programming. Synchronous channels allow communication ...
Richard Sharp, Alan Mycroft