164 search results - page 27 / 33 » Executable Computational Logics: Combining Formal Methods an... |
SIGSOFT
2007
ACM
14 years 8 months ago
2007
ACM
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
EH
1999
IEEE
1999
IEEE
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
13 years 12 months ago
Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraint...
JMLR
2012
11 years 10 months ago
2012
Open-text semantic parsers are designed to interpret any statement in natural language by inferring a corresponding meaning representation (MR – a formal representation of its s...
ATAL
2005
Springer
14 years 1 months ago
2005
Springer
We present dcl-pc: a dynamic logic of delegation and cooperation. The logical foundation of dcl-pc is cl-pc, a logic for reasoning about cooperation in which the powers of agents ...
KBSE
2000
IEEE
13 years 11 months ago
2000
IEEE
c specifications provide a powerful method for the specification of abstract data types in programming languages and software systems. Completeness and ground confluence are fundam...