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APCSAC
2003
IEEE
14 years 1 months ago
Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures
Very Long Instruction Word (VLIW) architectures exploit instruction level parallelism (ILP) with the help of the compiler to achieve higher instruction throughput with minimal hard...
Pradeep Rao, S. K. Nandy, M. N. V. Satya Kiran
ASPLOS
2006
ACM
14 years 4 months ago
A spatial path scheduling algorithm for EDGE architectures
Growing on-chip wire delays are motivating architectural features that expose on-chip communication to the compiler. EDGE architectures are one example of communication-exposed mi...
Katherine E. Coons, Xia Chen, Doug Burger, Kathryn...
PLSA
1994
14 years 2 months ago
Language and Architecture Paradigms as Object Classes
Computer language paradigms offer linguistic abstractions and proof theories for expressing program implementations. Similarly, system architectures offer the hardware abstractions...
Diomidis Spinellis, Sophia Drossopoulou, Susan Eis...
VEE
2012
ACM
238views Virtualization» more  VEE 2012»
12 years 5 months ago
Swift: a register-based JIT compiler for embedded JVMs
Code quality and compilation speed are two challenges to JIT compilers, while selective compilation is commonly used to tradeoff these two issues. Meanwhile, with more and more Ja...
Yuan Zhang, Min Yang, Bo Zhou, Zhemin Yang, Weihua...
PPOPP
2009
ACM
14 years 10 months ago
OpenMP to GPGPU: a compiler framework for automatic translation and optimization
GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. Although a new Compute Unified Device Architecture (CUDA) programming model from N...
Seyong Lee, Seung-Jai Min, Rudolf Eigenmann