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DAC
1996
ACM
13 years 12 months ago
Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures
The advent of parallel executing Address Calculation Units (ACUs) in Digital Signal Processor (DSP) and Application Specific InstructionSet Processor (ASIP) architectures has made...
Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerra...
HPCA
1997
IEEE
13 years 12 months ago
Architectural Support for Compiler-Synthesized Dynamic Branch Prediction Strategies: Rationale and Initial Results
This paper introduces a new architectural approach that supports compiler-synthesized dynamic branch predication. In compiler-synthesized dynamic branch prediction, the compiler g...
David I. August, Daniel A. Connors, John C. Gyllen...
MICRO
1994
IEEE
118views Hardware» more  MICRO 1994»
13 years 12 months ago
Characterizing the impact of predicated execution on branch prediction
Branch instructions are recognized as a major impediment to exploiting instruction level parallelism. Even with sophisticated branch prediction techniques, many frequently execute...
Scott A. Mahlke, Richard E. Hank, Roger A. Bringma...
IEEEINTERACT
2003
IEEE
14 years 1 months ago
Compiler-Directed Resource Management for Active Code Regions
Recent studies on program execution behavior reveal that a large amount of execution time is spent in small frequently executed regions of code. Whereas adaptive cache management ...
Ravikrishnan Sree, Alex Settle, Ian Bratt, Daniel ...
MICRO
1999
IEEE
109views Hardware» more  MICRO 1999»
14 years 7 hour ago
Compiler-Directed Dynamic Computation Reuse: Rationale and Initial Results
Recent studies on value locality reveal that many instructions are frequently executed with a small variety of inputs. This paper proposes an approach that integrates architecture...
Daniel A. Connors, Wen-mei W. Hwu