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ISSS
2002
IEEE
127views Hardware» more  ISSS 2002»
14 years 3 months ago
Validation in a Component-Based Design Flow for Multicore SoCs
Currently, since many SoCs include heterogeneous components such as CPUs, DSPs, ASICs, memories, buses, etc., system integration becomes a major step in the design flow. To enable...
Ahmed Amine Jerraya, Sungjoo Yoo, Aimen Bouchhima,...
ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
14 years 3 months ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock
DARPA
2009
Springer
136views Robotics» more  DARPA 2009»
14 years 3 months ago
Junior: The Stanford Entry in the Urban Challenge
This article presents the architecture of Junior, a robotic vehicle capable of navigating urban environments autonomously. In doing so, the vehicle is able to select its own route...
Michael Montemerlo, Jan Becker, Suhrid Bhat, Hendr...
FPL
2009
Springer
135views Hardware» more  FPL 2009»
14 years 3 months ago
Fast critical sections via thread scheduling for FPGA-based multithreaded processors
As FPGA-based systems including soft processors become increasingly common, we are motivated to better understand the architectural trade-offs and improve the efficiency of these...
Martin Labrecque, J. Gregory Steffan
EUROPAR
2001
Springer
14 years 2 months ago
Self-Organizing Hierarchical Cluster Timestamps
Distributed-system observation tools require an efficient data structure to store and query the partial-order of execution. Such data structures typically use vector timestamps to...
Paul A. S. Ward, David J. Taylor