453 search results - page 15 / 91 » Execution and Cache Performance of the Scheduled Dataflow Ar... |
JCIT
2008
13 years 7 months ago
2008
Active database systems (ADBS) can, automatically, react to the occurrence of predefined events by definition a collection of active rules. One of the most important modules of AD...
CASES
2007
ACM
13 years 11 months ago
2007
ACM
Software Defined Radio (SDR) is an emerging embedded domain where the physical layer of wireless protocols is implemented in software rather than the traditional application speci...
EMSOFT
2007
Springer
14 years 1 months ago
2007
Springer
This paper describes techniques to estimate the worst case execution time of executable code on architectures with data caches. The underlying mechanism is Abstract Interpretation...
ICPP
2009
IEEE
14 years 2 months ago
2009
IEEE
The multicore revolution is underway, bringing new chips introducing more complex memory architectures. Classical algorithms must be revisited in order to take the hierarchical me...
CODES
2011
IEEE
12 years 7 months ago
2011
IEEE
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...