453 search results - page 41 / 91 » Execution and Cache Performance of the Scheduled Dataflow Ar... |
LCTRTS
2009
Springer
14 years 3 months ago
2009
Springer
Multicores are becoming ubiquitous, not only in general-purpose but also embedded computing. This trend is a reflexion of contemporary embedded applications posing steadily incre...
HIPEAC
2009
Springer
14 years 3 months ago
2009
Springer
Heterogeneous architectures are currently widespread. With the advent of easy-to-program general purpose GPUs, virtually every recent desktop computer is a heterogeneous system. Co...
ISCA
1993
IEEE
14 years 1 months ago
1993
IEEE
Parallel programs that use critical sections and are executed on a shared-memory multiprocessor with a writeinvalidate protocol result in invalidation actions that could be elimin...
HPCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Growing concerns about power have revived interest in in-order pipelines. In-order pipelines sacrifice single-thread performance. Specifically, they do not allow execution to flow...
LCTRTS
2007
Springer
14 years 3 months ago
2007
Springer
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...