453 search results - page 83 / 91 » Execution and Cache Performance of the Scheduled Dataflow Ar... |
ASPLOS
2006
ACM
14 years 1 months ago
2006
ACM
For transactional memory (TM) to achieve widespread acceptance, transactions should not be limited to the physical resources of any specific hardware implementation. TM systems s...
CLUSTER
2007
IEEE
14 years 1 months ago
2007
IEEE
— SuperMatrix out-of-order scheduling leverages el abstractions and straightforward data dependency analysis to provide a general-purpose mechanism for obtaining parallelism from...
PVLDB
2010
13 years 6 months ago
2010
The shift to multi-core hardware brings new challenges to database systems, as the software parallelism determines performance. Even though database systems traditionally accommod...
CAINE
2006
13 years 9 months ago
2006
The synergy of software and hardware leads to efficient application expression profile (AEP) not only in terms of execution time and energy but also optimal architecture usage. We...
CASES
2006
ACM
14 years 1 months ago
2006
ACM
The architectural design of embedded systems is becoming increasingly idiosyncratic to meet varying constraints regarding energy consumption, code size, and execution time. Tradit...