Sciweavers

555 search results - page 91 / 111
» Execution levels for aspect-oriented programming
Sort
View
ICCD
2006
IEEE
115views Hardware» more  ICCD 2006»
14 years 4 months ago
Microarchitecture and Performance Analysis of Godson-2 SMT Processor
—This paper introduces the microarchitecture and logical implementation of SMT (Simultaneous Multithreading) improvement of Godson-2 processor which is a 64-bit, four-issue, out-...
Zusong Li, Xianchao Xu, Weiwu Hu, Zhimin Tang
ICPPW
2009
IEEE
14 years 2 months ago
Hardware Microkernels for Heterogeneous Manycore Systems
Abstract— The migration away from power-hungry, speculative execution procesors towards manycore architectures is good news for the embedded and real-time systems community. Comm...
Jason Agron, David L. Andrews
ICCS
2009
Springer
14 years 2 months ago
A Holistic Approach for Performance Measurement and Analysis for Petascale Applications
Abstract. Contemporary high-end Terascale and Petascale systems are composed of hundreds of thousands of commodity multi-core processors interconnected with high-speed custom netwo...
Heike Jagode, Jack Dongarra, Sadaf R. Alam, Jeffre...
DSN
2008
IEEE
14 years 2 months ago
A fault-tolerant directory-based cache coherence protocol for CMP architectures
Current technology trends of increased scale of integration are pushing CMOS technology into the deepsubmicron domain, enabling the creation of chips with a significantly greater...
Ricardo Fernández Pascual, José M. G...
ICNP
2007
IEEE
14 years 2 months ago
Network-based and Attack-resilient Length Signature Generation for Zero-day Polymorphic Worms
—It is crucial to detect zero-day polymorphic worms and to generate signatures at the edge network gateways or honeynets so that we can prevent the worms from propagating at thei...
Zhichun Li, Lanjia Wang, Yan Chen, Zhi Fu