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ISQED
2008
IEEE
153views Hardware» more  ISQED 2008»
14 years 4 months ago
Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding
Clock meshes have found increasingly wide applications in today’s high-performance IC designs. The inherent routing redundancies associated with clock meshes lead to improved cl...
Xiaoji Ye, Min Zhao, Rajendran Panda, Peng Li, Jia...
MICRO
2008
IEEE
131views Hardware» more  MICRO 2008»
14 years 4 months ago
Token flow control
As companies move towards many-core chips, an efficient onchip communication fabric to connect these cores assumes critical importance. To address limitations to wire delay scala...
Amit Kumar 0002, Li-Shiuan Peh, Niraj K. Jha
HICSS
2007
IEEE
181views Biometrics» more  HICSS 2007»
14 years 4 months ago
A Methodology to Evaluate Agent Oriented Software Engineering Techniques
Systems using Software Agents (or Multi-Agent Systems, MAS) are becoming more popular within the development mainstream because, as the name suggests, an Agent aims to handle task...
Chia-En Lin, Krishna M. Kavi, Frederick T. Sheldon...
INFOCOM
2007
IEEE
14 years 4 months ago
On the Extreme Parallelism Inside Next-Generation Network Processors
Next-generation high-end Network Processors (NP) must address demands from both diversified applications and ever-increasing traffic pressure. One major challenge is to design an e...
Lei Shi, Yue Zhang 0006, Jianming Yu, Bo Xu, Bin L...
INFOCOM
2007
IEEE
14 years 4 months ago
Iterative Scheduling Algorithms
— The input-queued switch architecture is widely used in Internet routers due to its ability to run at very high line speeds. A central problem in designing an input-queued switc...
Mohsen Bayati, Balaji Prabhakar, Devavrat Shah, Ma...
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