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LCTRTS
2007
Springer
15 years 10 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
SEMWEB
2007
Springer
15 years 10 months ago
Analyzing Mapping Extraction Approaches
While lots of research in ontology matching is related to the issue of computing and refining similarity measures, only little attention has been paid to question how to extract t...
Christian Meilicke, Heiner Stuckenschmidt
RTAS
2006
IEEE
15 years 10 months ago
Bounding Preemption Delay within Data Cache Reference Patterns for Real-Time Tasks
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller
ISLPED
2006
ACM
83views Hardware» more  ISLPED 2006»
15 years 10 months ago
Considering process variations during system-level power analysis
Process variations will increasingly impact the operational characteristics of integrated circuits in nanoscale semiconductor technologies. Researchers have proposed various desig...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
SAC
2006
ACM
15 years 10 months ago
Automatic structured query transformation over distributed digital libraries
Structured data and complex schemas are becoming the main way to represent the information many Digital Libraries provide, thus impacting the services they offer. When searching i...
M. Elena Renda, Umberto Straccia