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» Experiences with Soft-Core Processor Design
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HPCA
2006
IEEE
14 years 8 months ago
Construction and use of linear regression models for processor performance analysis
Processor architects have a challenging task of evaluating a large design space consisting of several interacting parameters and optimizations. In order to assist architects in ma...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...
FPL
2006
Springer
147views Hardware» more  FPL 2006»
13 years 11 months ago
Efficient Automated Synthesis, Programing, and Implementation of Multi-Processor Platforms on FPGA Chips
Emerging embedded System-on-Chip (SoC) platforms are increasingly becoming multiprocessor architectures. The advances in the FPGA chip technology make the implementation of such a...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere
DSN
2011
IEEE
12 years 7 months ago
Cross-layer resilience using wearout aware design flow
—As process technology shrinks devices, circuits experience accelerated wearout. Monitoring wearout will be critical for improving the efficiency of error detection and correctio...
Bardia Zandian, Murali Annavaram
CASES
2006
ACM
13 years 11 months ago
High-performance packet classification algorithm for many-core and multithreaded network processor
Packet classification is crucial for the Internet to provide more value-added services and guaranteed quality of service. Besides hardware-based solutions, many software-based cla...
Duo Liu, Bei Hua, Xianghui Hu, Xinan Tang
DATE
2004
IEEE
119views Hardware» more  DATE 2004»
13 years 11 months ago
MINCE: Matching INstructions Using Combinational Equivalence for Extensible Processor
Designing custom-extensible instructions for Extensible Processors1 is a computationally complex task because of the large design space. The task of automatically matching candida...
Newton Cheung, Sri Parameswaran, Jörg Henkel,...