The ability to integrate diverse components such as processor cores, memories, custom hardware blocks and complex network-on-chip (NoC) communication frameworks onto a single chip...
Jason Cong, Karthik Gururaj, Guoling Han, Adam Kap...
-- In this paper a Rapid Prototyping Framework and next steps towards the support for interactive Architecture Exploration based on the SPEAR processor core (Scalable Processor for...
Martin Jankela, Wolfgang Puffitsch, Wolfgang Huber
Power-based side channel attacks are a significant security risk, especially for embedded applications. To improve the security of such devices, protected logic styles have been p...
Francesco Regazzoni, Alessandro Cevrero, Fran&cced...
—Huge new design challenges for system-on-chip (SoC) are the result of decreasing time-to-market coupled with rapidly increasing gate counts and embedded software representing 50...
One of the interesting problems in hardware-software co-design is that of debugging embedded software in conjunction with hardware. Currently, most software designers wait until a...
A. Ghosh, M. Bershteyn, R. Casley, C. Chien, A. Ja...