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DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
15 years 10 months ago
Layout to Logic Defect Analysis for Hierarchical Test Generation
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
Maksim Jenihhin, Jaan Raik, Raimund Ubar, Witold A...
117
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HPDC
2007
IEEE
15 years 10 months ago
Feedback-directed thread scheduling with memory considerations
This paper describes a novel approach to generate an optimized schedule to run threads on distributed shared memory (DSM) systems. The approach relies upon a binary instrumentatio...
Fengguang Song, Shirley Moore, Jack Dongarra
139
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ISMAR
2007
IEEE
15 years 10 months ago
Real-Time Object Tracking for Augmented Reality Combining Graph Cuts and Optical Flow
We present an efficient and accurate object tracking algorithm based on the concept of graph cut segmentation. The ability to track visible objects in real-time provides an inval...
Jonathan Mooser, Suya You, Ulrich Neumann
GECCO
2007
Springer
211views Optimization» more  GECCO 2007»
15 years 9 months ago
Multi-objective univariate marginal distribution optimisation of mixed analogue-digital signal circuits
Design for specific customer service plays a crucial role for the majority of the market in modern electronics. However, adaptability to an individual customer results in increasi...
Lyudmila Zinchenko, Matthias Radecker, Fabio Bisog...
SCIA
2007
Springer
154views Image Analysis» more  SCIA 2007»
15 years 9 months ago
3D Deformable Registration for Monitoring Radiotherapy Treatment in Prostate Cancer
Two deformable registration methods, the Demons and the Morphon algorithms, have been used for registration of CT datasets to evaluate their usability in radiotherapy planning for ...
Borja Rodríguez-Vila, Johanna Pettersson, M...