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» Explaining Verification Conditions
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ICFEM
1997
Springer
14 years 2 days ago
Formally Specifying and Verifying Real-Time Systems
A real-time computer system is a system that must perform its functions within specified time bounds. These systems are generally characterized by complex interactions with the en...
Richard A. Kemmerer
ICCAD
1994
IEEE
122views Hardware» more  ICCAD 1994»
14 years 1 days ago
An enhanced flow model for constraint handling in hierarchical multi-view design environments
In this paper we present an enhanced design flow model that increases the capabilities of a CAD framework to support design activities on hierarchical multi-view design descriptio...
Pieter van der Wolf, K. Olav ten Bosch, Alfred van...
ACMACE
2007
ACM
13 years 12 months ago
Serious video game effectiveness
Given the interactive media characteristics and intrinsically motivating appeal, computer games are often praised for their potential and value in education. However, comprehensiv...
Wee Ling Wong, Cuihua Shen, Luciano Nocera, Eduard...
FSEN
2007
Springer
13 years 11 months ago
Test Selection Criteria for Quantifier-Free First-Order Specifications
This paper deals with test case selection from axiomatic specifications whose axioms are quantifier-free first-order formulae. Test cases are modeled as ground formulae and any spe...
Marc Aiguier, Agnès Arnould, Pascale Le Gal...
DATE
2009
IEEE
115views Hardware» more  DATE 2009»
13 years 11 months ago
Customizing IP cores for system-on-chip designs using extensive external don't-cares
Traditional digital circuit synthesis flows start from an HDL behavioral definition and assume that circuit functions are almost completely defined, making don't-care conditio...
Kai-Hui Chang, Valeria Bertacco, Igor L. Markov