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    » Exploiting Architecture in Experimental System Development
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    VLSID
    2008
    IEEE
    150views VLSI» more  VLSID 2008»
    PTSMT: A Tool for Cross-Level Power, Performance, and Thermal Exploration of SMT Processors
    14 years 9 months ago
    PTSMT: A Tool for Cross-Level Power, Performance, and Thermal Exploration of SMT Processors
    Download  www.public.asu.edu
    Simultaneous Multi-Threading (SMT) processors are becoming popular because they exploit both instruction-level and threadlevel parallelism by issuing instructions from different t...
    Deepa Kannan, Aseem Gupta, Aviral Shrivastava, Nik...
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    PC
    2010
    190views Management» more  PC 2010»
    High-performance cone beam reconstruction using CUDA compatible GPUs
    13 years 7 months ago
    High-performance cone beam reconstruction using CUDA compatible GPUs
    Download  www-hagi.ist.osaka-u.ac.jp
    Compute unified device architecture (CUDA) is a software development platform that allows us to run C-like programs on the nVIDIA graphics processing unit (GPU). This paper prese...
    Yusuke Okitsu, Fumihiko Ino, Kenichi Hagihara
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    SIGMETRICS
    2011
    ACM
    229views Hardware» more  SIGMETRICS 2011»
    Model-driven optimization of opportunistic routing
    12 years 11 months ago
    Model-driven optimization of opportunistic routing
    Download  www.cs.utexas.edu
    Opportunistic routing aims to improve wireless performance by exploiting communication opportunities arising by chance. A key challenge in opportunistic routing is how to achieve ...
    Eric Rozner, Mi Kyung Han, Lili Qiu, Yin Zhang
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    DAC
    2009
    ACM
    106views Computer Architecture» more  DAC 2009»
    On systematic illegal state identification for pseudo-functional testing
    14 years 9 months ago
    On systematic illegal state identification for pseudo-functional testing
    Download  www.cse.cuhk.edu.hk
    The discrepancy between integrated circuits' activities in normal functional mode and that in structural test mode has an increasing adverse impact on the effectiveness of ma...
    Feng Yuan, Qiang Xu
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    DAC
    2009
    ACM
    150views Computer Architecture» more  DAC 2009»
    A DVS-based pipelined reconfigurable instruction memory
    14 years 9 months ago
    A DVS-based pipelined reconfigurable instruction memory
    Download  esl.cse.nsysu.edu.tw
    Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
    Zhiguo Ge, Tulika Mitra, Weng-Fai Wong
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