29 search results - page 6 / 6 » Exploiting Choice: Instruction Fetch and Issue on an Impleme... |
128
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CORR
2010
Springer
15 years 3 months ago
2010
Springer
Space is a spatial programming language designed to exploit the massive parallelism available in a formal model of computation called the Synchronic A-Ram, and physically related ...
127
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ISCA
2010
IEEE
15 years 7 months ago
2010
IEEE
Chip Multiprocessors (CMPs) are now commodity hardware, but commoditization of parallel software remains elusive. In the near term, the current trend of increased coreper-socket c...
166
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IWOMP
2007
Springer
15 years 9 months ago
2007
Springer
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
116
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MICRO
2002
IEEE
15 years 8 months ago
2002
IEEE
Register integration (or just integration) is a register renaming discipline that implements instruction reuse via physical register sharing. Initially developed to perform squash...