40 search results - page 3 / 8 » Exploiting Contemporary Memory Techniques in Reconfigurable ... |
ISPASS
2003
IEEE
14 years 28 days ago
2003
IEEE
Abstract— This paper proposes to speedup sampled microprocessor simulations by reducing warmup times without sacrificing simulation accuracy. It exploiting the observation that ...
TCAD
2008
13 years 7 months ago
2008
Abstract--Multimedia and DSP applications have several computationally intensive kernels which are often offloaded and accelerated by application-specific hardware. This paper pres...
CG
2004
Springer
13 years 7 months ago
2004
Springer
Most volume rendering systems based on CPU volume raycasting still suffer from inefficient CPU utilization and high memory usage. To target these issues we present a new technique...
ISCA
2000
IEEE
14 years 1 days ago
2000
IEEE
The bandwidth and latency of a memory system are strongly dependent on the manner in which accesses interact with the “3-D” structure of banks, rows, and columns characteristi...
TC
2010
13 years 2 months ago
2010
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...