87 search results - page 6 / 18 » Exploiting Instruction Redundancy for Transient Fault Tolera... |
IEEEPACT
2006
IEEE
14 years 1 months ago
2006
IEEE
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
Future microprocessors will be highly susceptible to transient errors as the sizes of transistors decrease due to CMOS scaling. Prior techniques advocated full scale structural or...
DSN
2002
IEEE
14 years 13 days ago
2002
IEEE
Concentration of design effort for current single-chip Commercial-Off-The-Shelf (COTS) microprocessors has been directed towards performance. Reliability has not been the primary ...
CLEIEJ
2006
13 years 7 months ago
2006
This paper describes a single-version algorithmic approach to design in fault tolerant computing in various computing systems by using static redundancy in order to mask transient...
ESOP
2010
Springer
14 years 4 months ago
2010
Springer
Transient faults are single-shot hardware errors caused by high energy particles from space, manufacturing defects, overheating, and other sources. Such faults can be devastating f...