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ISCAPDCS
2003
13 years 8 months ago
Dynamic Simultaneous Multithreaded Architecture
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...
Daniel Ortiz Arroyo, Ben Lee
ICDCS
2012
IEEE
11 years 9 months ago
G-COPSS: A Content Centric Communication Infrastructure for Gaming Applications
—With users increasingly focused on an online world, an emerging challenge for the network infrastructure is the need to support Massively Multiplayer Online Role Playing Games (...
Jiachen Chen, Mayutan Arumaithurai, Xiaoming Fu, K...
JCM
2010
126views more  JCM 2010»
13 years 5 months ago
Adding Redundancy to Replication in Window-aware Delay-tolerant Routing
— This paper presents a resource-efficient protocol for opportunistic routing in delay-tolerant networks (DTN). First, our approach exploits the context of mobile nodes (speed, ...
Gabriel Sandulescu, Simin Nadjm-Tehrani
HPCA
2009
IEEE
14 years 7 months ago
Accurate microarchitecture-level fault modeling for studying hardware faults
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There is much ongoing research on efficient fault t...
Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu...
HPCC
2009
Springer
13 years 12 months ago
On the Performance of Commit-Time-Locking Based Software Transactional Memory
Compared with lock-based synchronization techniques, Software Transactional Memory (STM) can significantly improve the programmability of multithreaded applications. Existing res...
Zhengyu He, Bo Hong