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SASP
2009
IEEE
291views Hardware» more  SASP 2009»
14 years 2 months ago
FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
Alexandros Papakonstantinou, Karthik Gururaj, John...
HICSS
2005
IEEE
158views Biometrics» more  HICSS 2005»
14 years 29 days ago
Social Networks in Peer-to-Peer Systems
The Gnutella protocol requires peers to broadcast messages to their neighbours when they search files. The message passing generates a lot of traffic in the network, which degrade...
Yamini Upadrashta, Julita Vassileva, Winfried K. G...
GLOBECOM
2008
IEEE
13 years 7 months ago
On the Impact of Caching for High Performance Packet Classifiers
Hash functions have a space complexity of O(n) and a possible time complexity of O(1). Thus, packet classifiers exploit hashing to achieve packet classification in wire speed. Esp...
Harald Widiger, Andreas Tockhorn, Dirk Timmermann
TWC
2010
13 years 2 months ago
Closed-Loop Transmit Diversity with Imperfect Feedback
The closed-loop transmit diversity technique is used to improve the performance of the downlink channel in MIMO communication systems. In these closed-loop systems, feedback delay...
A. Heidari, Amir K. Khandani
VLSISP
2008
123views more  VLSISP 2008»
13 years 7 months ago
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...