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ISSS
2002
IEEE
133views Hardware» more  ISSS 2002»
14 years 1 months ago
Efficient Simulation of Synthesis-Oriented System Level Designs
Modeling for synthesis and modeling for simulation seem to be two competing goals in the context of C++-based modeling frameworks. One of the reasons is while most hardware system...
Rajesh K. Gupta, Sandeep K. Shukla, Nick Savoiu
CCGRID
2006
IEEE
14 years 2 months ago
Fast Freenet: Improving Freenet Performance by Preferential Partition Routing and File Mesh Propagation
The Freenet Peer-to-Peer network is doing a good job in providing anonymity to the users. But the performance of the network in terms of download speed and request hit ratio is no...
Hans-Emil Skogh, Jonas Haeggstrom, Ali Ghodsi, Ras...
IPPS
2000
IEEE
14 years 21 days ago
Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda
MICRO
1999
IEEE
143views Hardware» more  MICRO 1999»
14 years 18 days ago
Code Transformations to Improve Memory Parallelism
Current microprocessors incorporate techniques to exploit instruction-level parallelism (ILP). However, previous work has shown that these ILP techniques are less effective in rem...
Vijay S. Pai, Sarita V. Adve
ICCS
2005
Springer
14 years 1 months ago
Self-optimization of Large Scale Wildfire Simulations
The development of efficient parallel algorithms for large scale wildfire simulations is a challenging research problem because the factors that determine wildfire behavior are com...
Jingmei Yang, Huoping Chen, Salim Hariri, Manish P...