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DATE
2002
IEEE
104views Hardware» more  DATE 2002»
14 years 1 months ago
A Compiler-Based Approach for Improving Intra-Iteration Data Reuse
Intra-iteration data reuse occurs when multiple array references exhibit data reuse in a single loop iteration. An optimizing compiler can exploit this reuse by clustering (in the...
Mahmut T. Kandemir
JCST
2010
147views more  JCST 2010»
13 years 7 months ago
Volumetric Vector-Based Representation for Indirect Illumination Caching
Abstract This paper introduces a caching technique based on a volumetric representation that captures low-frequency indirect illumination. This structure is intended for efficient ...
Romain Pacanowski, Xavier Granier, Christophe Schl...
MICRO
2008
IEEE
138views Hardware» more  MICRO 2008»
14 years 3 months ago
Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs
As the number of transistors integrated on a chip continues to increase, a growing challenge is accurately modeling performance in the early stages of processor design. Analytical...
Xi E. Chen, Tor M. Aamodt
CF
2006
ACM
14 years 2 months ago
Improving the memory behavior of vertical filtering in the discrete wavelet transform
The discrete wavelet transform (DWT) is used in several image and video compression standards, in particular JPEG2000. A 2D DWT consists of horizontal filtering along the rows fo...
Asadollah Shahbahrami, Ben H. H. Juurlink, Stamati...
ISCA
1997
IEEE
135views Hardware» more  ISCA 1997»
14 years 24 days ago
The Design and Analysis of a Cache Architecture for Texture Mapping
The effectiveness of texture mapping in enhancing the realism of computer generated imagery has made support for real-time texture mapping a critical part of graphics pipelines. D...
Ziyad S. Hakura, Anoop Gupta