11 search results - page 2 / 3 » Exploiting parallelism and structure to accelerate the simul... |
CAL
2006
13 years 7 months ago
2006
Multiple core designs have become commonplace in the processor market, and are hence a major focus in modern computer architecture research. Thus, for both product development and ...
SPAA
2010
ACM
14 years 8 days ago
2010
ACM
We explore the potential of hardware transactional memory (HTM) to improve concurrent algorithms. We illustrate a number of use cases in which HTM enables significantly simpler c...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
Logic simulation is a critical component of the design tool flow in modern hardware development efforts. It is used widely ? from high-level descriptions down to gate-level ones ?...
ICS
2007
Tsinghua U.
14 years 1 months ago
2007
Tsinghua U.
This paper presents Cooperative Cache Partitioning (CCP) to allocate cache resources among threads concurrently running on CMPs. Unlike cache partitioning schemes that use a singl...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
Modern chip multiprocessors (CMPs) are designed to exploit both instruction-level parallelism (ILP) within processors and thread-level parallelism (TLP) within and across processo...